This is vikas from Connectpro Management Consultants. We are having an opening in Texas Instruments www.ti.com Bangalore. RTL SoC RTL Design Engineer This role involves: • RTL development for ARM Cortex™-R core based SoCs with central bus topology involving ARM-AXI/AHB, OCP and CBA based interconnects • Ownership of full chip integration of chip specific IPs like USB, CAN controller, Ethernet MAC, FlexRay, CRC & ECC based subsystem • Handling device level RTL requirements for automotive qualification and built-in safety features • Participating and driving key aspects of device specification (e.g clocking, resets, power management, switch fabric, pin muxing, chip level safety aspects etc) • Playing a significant role in driving timing constraints and closure of core as well as interface timing • Working closely with PD, DFT and DV domain team members • Interface with IP owners and device architects Qualifications: • 2-8 years of experience in RTL integration • Solid digital design knowledge • Good understanding of SoC architecture • Tool knowledge – Spyglass, LEC, DC / RC, PT • Experience with Verilog/VHDL • Hands on working knowledge in scripting languages – Perl/Tcl • Hands on working knowledge of constraints development / Synthesis and Timing closure • Good communication and presentation skills and team work • Preferred additional qualifications: 1. Familiarity with HL0.8, CDDS, flow3, Atrenta-Genesis RTL integration tool 2. Constraints development and timing closure 3. Understanding of DV and DFT IP RTL Design Engineer This role involves: • IP RTL development for ARM Cortex™-R CPU based designs • Design of system and peripheral IP modules commonly used for various functions in automotive systems. Some IP examples include o Real-time BIST controllers, CRC/ECC modules, Switched Central Resource (OCP Switch Fabric), micro-coded timers, Flash Controller, PWM and capture modules o Digital wrappers for Analog interfaces like ADC, PLL, PHYs o Adaptation of Flexray/CAN/LIN controllers, MibSPI, Ethernet MAC, PWM/Quadrature encoders, Power Management for automotive safety applications. • Participating and driving key aspects of IP Specification, including meeting Automotive quality • Driving internal/IO timing constraints for the IP, and working closely with SoC folks on closure of IP timing • Working closely with SoC team to ensure proper integration and usage of the IP • Enabling 0-DPPM DFT coverage for the IPs, with BIST/Loopback for at-speed coverage, wherever applicable Qualifications: • 3-8 years of experience in IP Design and/or RTL integration • Solid digital design knowledge • Verilog/VHDL languages • Knowledge of DFT / Constraints development/Synthesis/Timing closure • Good communication / presentation skills and team work • Preferred additional qualifications: 1. Familiarity with ARM Cortex™-Rx/Mx CPUs, AXI/AHB/APB, CBA and OCP bus protocols 2. Knowledge of CAN/LIN/Flexray/Communication protocols 3. Familiarity with HL0.8, CDDS, flow3 If you are interested please let us know.and send me your updated resume with details. Current salary. Expected Salary. Notice period. Waiting for your reply. Thanks & Regard Vikas Kumar Email ID: vikas.hyderabad@connectprosearch.com : connectpro.vikas@gmail.com |
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